// (C) Copyright 2012 Kystar. All rights reserved.

`timescale 1ns/100ps
`default_nettype none

module self_sync
#(
    parameter           SYNC_MIN_NUM = 512,
    parameter           TICK_NUM = 22'd2083333
)
(
    // system signal
    input  wire         I_sclk,  // 125M
    input  wire         I_rst_n,
    // sync
    input  wire         I_sync_en,
    input  wire [21:0]  I_sync_tick,
    output wire         O_frame_sync,
    output wire [21:0]  O_current_tick
);

/******************************************************************************
                                <localparams>
******************************************************************************/


/******************************************************************************
                              <internal signals>
******************************************************************************/
reg  [ 21: 0] current_tick;
reg  frame_sync;

/******************************************************************************
                                <module body>
******************************************************************************/

// current_tick
always @(posedge I_sclk or negedge I_rst_n) begin
    if (!I_rst_n)
        current_tick <= TICK_NUM - 1'b1;
    else if (frame_sync)
        current_tick <= TICK_NUM - 1'b1;
    else if (I_sync_en && current_tick >= SYNC_MIN_NUM)
        current_tick <= I_sync_tick;
    else
        current_tick <= current_tick - 1'b1;
end

always @(posedge I_sclk or negedge I_rst_n)
    if (!I_rst_n)
        frame_sync <= 1'b0;
    else if(current_tick==1)
        frame_sync <= 1'b1;
    else
        frame_sync <= 1'b0;

assign O_current_tick = current_tick;
assign O_frame_sync = frame_sync;

endmodule
`default_nettype wire

